Crystek’s CPLL58-1800-1860 PLL/synthesiser operates from 1800 to 1860 MHz with a typical step size of 10 kHz.
Its construction wraps a VCO around a PLL in a package that’s only marginally larger than a VCO on its own and is smaller than separate VCO/PLL modules.
The synthesiser is a complete PLL/unit needing only an external frequency reference and supply voltages for the internal PLL and VCO. It is programmed using a standard three-line interface (data, clock and load enable).
Typical phase noise is -103 dBc/Hz at 10 kHz offset with minimum output of 3 dBm. VCO voltage is 5 VDC; PLL voltage is 3 VDC; second harmonic suppression is -20 dBc typical.
